/* fuses: efuse=0xFF (def) self prg disable hfuse=0xDF (def) RSTDISBL:DWEN:SPIEN:WDTON:EESAVE:BODLEVEL[2..0] lfuse=0x62 (def) Internal RC on 8.0 MHz, clock is 1MHz */ #include #include #include #include #include #include #define dir PB1 #define inv PB0 #define cycl PB4 #define lrn PB3 #define myPORT PORTB #define myDDR DDRB #define myPIN PINB volatile unsigned int seconds=0; unsigned int time1 EEMEM = 0, time2 EEMEM = 0; unsigned int eetmpr EEMEM =0; unsigned int pulse, pause; unsigned int tmpr; void init (void) { // function configure I/O pins and CLK source cli(); myDDR |= 1< T0presc => TCNT0 => T0ovfl => variable TCCR0B |= 1<